ARM Cortex-A系列处理器：4颗A7比1颗A15厉害吗？

ARM Cortex-A 系列处理器一般分为低、中和高性能三个性能层级。高阶处理器可实现最佳化性能，而低阶处理器则在一定的性能级强调最佳化功效，但均支持“big.LITTLE”架构以及异质多核心处理。 以32位处理器架构来看，ARM 分别提供了 A7 、 A12 与 A15 处理器，而64位架构则有 Cortex-A57 ，高功效处理器则是 Cortex-A53 。 这是否意味着市场可预期ARM将推出一系列 Cortex-A5X 系列中阶组件？根据我最近遇到的ARM主管表示该公司将持绩积极部署，但ARM将开始建置big-medium-little处理器核心策略吗？或许短期来看并非如此。 但从ARM工程师最近的产品现场展示来看，根据工作负载与建置的不同， Cortex-A7 与 A15 所表现出来的相对性能差异约在2-3倍之间。从下图来看，如果 Cortex-A7 的确仅占约1/4或1/5的芯片面积，仅消耗约1/4或1/5的功耗，那么事情将会变得十分有趣。

随着时间的推移，制程技术与架构的进展，处理器核心性能持续提升。
Source：ARMsRXesmc

值得注意的是，采用面积与功耗更高5倍的 Cortex-A15 ，相当于 Cortex-A7约2-3倍的性能。那么，为什么不用四颗 Cortex-A7 核心来取代 Cortex-A15 呢？不就能够在相同的功耗与芯片面积上实现更多原始性能吗？ 当然，其原因在于只考虑到了单一执行绪，但不能忽略多核心 SoC 架构的影响。 当我与ARM应用处理器产品销售副总裁Nandan Nayampally讨论这一点观察时，他说：“没错，针对多执行绪应用，4颗A7可实现较单一A15更高性能，但在移动应用中，单一执行绪的峰值性能更为重要。”一语道出了重点。 但Nandan Nayampally也坦承，精简型“LITTLE”核心在未来的SoC扮演至关重要的角色。他承认有些SoC可能相当依赖于“LITTLE”核心，“因 此，你将会看到连网SoC可能采用 A15 或 A57 以及许多的 A7 或 A53 。接着这将进一步转变成采用 A7 / A12 / A15 以及其它资源，再经由操作系统进行分配。” 本文授权编译自EE Times，版权所有，谢绝转载 编译：Susan Hong 参考英文原文：How ARM's Cortex-A7 Beats the A15，by Peter Clarke, European News Director

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{pagination} How ARM's Cortex-A7 Beats the A15 Peter Clarke, European News Director ARM's Cortex-A series of processors has now divided into three tiers associated with low, medium, and high performance. The high tier is optimized for performance, and the low tier is optimized for stripped-down power efficiency at lower absolute performance levels, all in support of the big-little and heterogeneous multicore processing. At the 32-bit level these three tiers feature the A7, the A12, and A15, and the 64-bit level is represented by the Cortex-A57. The high efficiency processor is the Cortex-A53. Does that mean the market should expect a series of mid-range parts in the Cortex-A5X series and going forward? Yes although ARM executives that I recently met with were also keen to keep their marketing powder dry. Does it mean that ARM is going to start implementing a big-medium-little processor core strategy? In the short term probably not, but I would like to assign that discussion for another day. But what ARM engineers did show me at a recent analysts' conference is that relative performance of the Cortex-A7 and A15 differs by a factor of two or three depending on workload and implementation. Now, when you add that to the fact that the Cortex-A7 occupies about one quarter or one fifth of the die area and consumes one quarter to one fifth of the power, things become interesting (see chart below). Three tiers of processor cores with performance going up and to the right over time. (Source: ARM) To reiterate: With a Cortex-A15, at five times the area and five times the power consumption, you can get two or three times the performance of the Cortex-A7. So why wouldn't you replace any Cortex-A15 cores with four Cortex-A7s? You would get more raw performance at about the same power consumption and in the same die area. The reason, of course, depends on considering single-thread performance, but still it makes you think about the implications for multicore SoC architectures. When I put my observation to Nandan Nayampally, vice president of product marketing for application processors at ARM, he said: "Yes four A7s is more performance than one A15 for multi-threaded applications, but in mobile, single-threaded peak performance is also important." Point made. But Nayampally conceded that the stripped-down "little" cores do have a vital role to play in future SoCs. He admitted that some SoCs may depend substantially on little cores. "So you will see things like networking SoCs with a couple of A15s or A57s and a lot of A7s or A53s. This then moves to generalize further to A7/A12/A15 and other resources, and an operating system governor will make allocations."