东芝Fab 5新厂激活用于3D NAND闪存生产

东芝公司(Toshiba)宣布将在今年八月激活位于日本三重县四日市的 Fab 5 新厂第二期工程，准备增加 NAND 闪存的制造产能，同时转移至 3D NAND 生产。 这项工程预计将在2014年夏天完成，东芝强调，目前尚未决定任何设备投资等细节，但未来将视市场动向而定。这表示东芝为该新厂的资本支出规模与速度，将取决于市况而调整。 在 2012年7月，东芝曾经因考虑到市场供过于求以及芯片降价压力，因而削减30%的 NAND 闪存产量。然而，在不到六个星期的时间，NAND闪存的一些客户们就开始抱怨内存芯片不足，而多年来持续降价的NAND芯片在2013年开始止跌回升。此外，日圆走软也让东芝较三星和SK海力士等竞争对手取得更佳优势。 Fab5厂的第二期工程将更强调减少对于环境的影响。相较于同样位于四日市的Fab 4厂，Fab5厂采用余热回收等基于 LED照明和节能的生产方式，可望降低13%的二氧化碳排放量。 Fab 5厂第2期工程预计在装机后，可望执行东芝多层 BICS (位成本可扩展的) 3D NAND 内存制造制程。虽然这种技术目前尚未量产，但东芝将能主导 3D NAND 制造地位。2012年底，该公司曾宣布开发出基于50nm垂直信道的16层原型设备，今年已可提供样片，并预计在2015年量产。 本文授权编译自EE Times，版权所有，谢绝转载 编译：Susan Hong 参考英文原文：Toshiba to Build Fab for 3D NAND Flash，by Peter Clarke

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{pagination} Toshiba to Build Fab for 3D NAND Flash Peter Clarke LONDON — Toshiba is preparing to increase NAND flash manufacturing capacity and move to vertically organized 3D NAND with the start of construction in August of the second phase of Fab 5 at its Yokkaichi facility in Mie, Japan. The building work will be completed in summer of 2014, Toshiba said in a statement, noting that decisions on equipment investment have not yet been taken but "will reflect market trends." This is a way of saying that Toshiba will vary the amount and speed of its capital expenditure at the site depending on market conditions. A year ago, in July 2012, Toshiba cut NAND flash production by 30 percent because it had concerns about market oversupply and downward pressure on chip prices. However, within six weeks some customers for NAND flash were complaining that they could not get enough of the memory chips. (See: NAND flash memory in short supply.) Prices for NAND chips, which had been in decline for many years, have picked up in 2013. A weaker yen also gives Toshiba an advantage over rivals such as Samsung and SK Hynix in South Korea. The second phase of Fab 5 will be built with an emphasis on minimizing the impact on the environment. LED-based lighting and energy-saving production methods with waste heat recovery are expected to reduce carbon dioxide emissions by 13 percent compared with Fab 4 on the same Yokkaichi site. When kitted out with equipment, Fab 5 Phase 2 will be capable of running Toshiba's multilayered BiCS (Bit-Cost Scalable) manufacturing process for 3D NAND memories. Although this kind of technology is not yet in production, Toshiba is leading the charge towards 3D NAND. In late 2012 the company announced that it had 16-layer prototype devices based on a 50 nm diameter vertical channel. Samples are due this year with volume production in 2015.